Intel has provided more details about the glass substrate at its annual event while promising to deliver 1 trillion transistors in a package by 2030. At the “Intel Innovation” event in San Jose, California, the company also announced the commercial debut of glass substrates in the second half of this decade.
Figure 1 Intel has demonstrated a test chip based on a glass substrate.
Intel has already demonstrated a fully functional test chip that uses 75-um through glass vias (TGVs) with a 20:1 aspect ratio and 1-mm core thickness (Figure 1). But what’s a glass substrate, and how does it differ from traditional epoxy-like ceramic and organic substrates? Below are five basic facts you need to grasp to understand this new chip substrate design.
A brand-new technology
Intel began working on glass substrates at its ultraclean CH8 factory in Chandler, Arizona, nearly a decade ago. The semiconductor behemoth has reportedly invested over $1 billion to make it work while building a new manufacturing line for this alternative to organic substrates. The glass R&D line has a staff of 600 people.
Figure 2 An Intel engineer holds the test glass core substrate panel.
This new glass bed for chip packages facilitates a tighter signal pitch than organic substrates. It’s promising speed and power benefits for large, power-hungry chips in servers and data centers. Glass substrates will also be handy when the industry moves to chiplets, incorporating multiple chips into a single package.
Technical merits
Glass, essentially silicon dioxide, is more stable at high temperatures. As a result, glass substrate handles higher temperatures more effectively while efficiently managing heat dissipation in high-performance chips. That leads to superior thermal and mechanical stability for chips.
Second, glass substrates enable a much higher interconnect density, which is crucial for power delivery and signal routing in next-generation packaging. That’s expected to significantly enhance connectivity of transistors within a chip package. Case in point: chip packages require very dense interconnections between chiplets to ensure that the package does not bend during production.
Figure 3 Here is a view of the ball grid array side of the Intel assembled glass substrate test chip.
Moreover, glass is easier to get flatter, and that makes packaging as well as lithography easier. Intel sources claim that glass substrates reduce pattern distortion by 50% to improve focus depth for lithography and thus ensure more precise and accurate semiconductor manufacturing.
Why now
Glass substrates are not merely about overcoming challenges like interconnect densities and temperature tolerance. Glass substrates, superior both in mechanical and electrical properties, are also less undesirable than organic substrates when building very large chips. These substrates can accommodate 10 times the power and data connections than today’s organic substrates. And that’s critical to large chips serving data artificial intelligence (AI) and high-performance computing (HPC) applications.
Figure 4 Intel claims to have produced the first glass substrate for next-generation advanced packaging.
Intel believes that ceramic and organic substrates will reach the limits of their capabilities in the coming years. According to Intel, by the end of the decade, the semiconductor industry will likely reach its limits on being able to scale transistors on a silicon package using organic materials. So, at a time when scaling is crucial to the progress and evolution of the semiconductor industry, glass substrates are a viable and essential next step for the next generation of semiconductors.
Intertwined with packaging, chiplets
The idea of the glass substrate is closely tied to advanced packaging and chiplet initiatives. The substrate, a medium on which a chip die sits, plays an important role in chip packaging. While ensuring structural stability for a chip, the substrate also carries signals from the chip die to the package. So, their superior mechanical stability and significantly higher interconnect density will be instrumental in creating high-performance chip packages.
Figure 5 Glass substrates complement advanced packaging technologies. Source: Intel
For a start, higher interconnect density enabled by glass substrate allows more transistors to be connected in a package. It’s worth noting that Intel has floated glass substrate at around the same time when it’s building multi-chiplet system-in-packages (SiPs) aimed primarily at data centers.
In fact, glass substrates are even more applicable to chiplets that pack more transistors into a package. The substrate’s ability to accommodate more connections between and among chiplets will lead to more chiplets in a package because of increased interconnect density.
What’s the catch?
If glass substrates embody such a game-changing leap, what’s the catch? “Basically, the innovation is done,” says Ann Kelleher, executive VP of technology development at Intel. That sounds like a subtle hint at the cost imperative; glass substrates will be more expensive to produce and package than tried-and-tested organic substrates. Then, there will be the yield issues at the start.
More importantly, glass substrates will need to build a viable ecosystem for commercial production. That includes necessary tooling and supply capacity. That’s why Intel is working closely with glass-handling equipment and material suppliers. The company will also have to find ways to outsource test and assembly of these new substrates.
Figure 6 Intel plans to offer packaging services for the chips based on glass substrates.
The Santa Clara, California-based chipmaker, planning to offer glass substrates to its Intel Foundry Services (IFS) customers in due time, is confident to eventually bring down the cost to parity with organic substrates. At the same time, Intel acknowledges that glass and organic substrates will coexist for years to come.
Intel will also likely not keep the glass substrate technology to itself. Still, glass packaging could offer Intel a huge competitive leap, especially for high-end chips serving AI and data centers. After all, it’s going to be a major technology transition.
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